Ferroelectric memories can retain data without a power supply, by operating their ferroelectric capacitors as variable capacitors and utilizing residual dielectric polarization remaining even after the voltages applied to the ferroelectric capacitors are removed.
In ferroelectric memories which store a binary value in one memory cell, a residual dielectric polarization value reverses by a read operation in a memory cell storing one of logical values (logic 1 for example). Accordingly, a rewrite operation is required for returning the residual dielectric polarization value to its original state after the read operation. On the other hand, in a memory cell storing the other one of the logical value (logic 0 for example), a residual dielectric polarization value does not reverse after a read operation. In general, in the case where a logical value, for which a residual dielectric polarization value does not reverse after a read operation, is stored in a memory cell, an imprint occurs by repeating the read operation. The imprint is a phenomenon such that a characteristic of a ferroelectric capacitor deteriorates by applying a unidirectional voltage (stress) constantly to the ferroelectric capacitor, and thereby a hysteresis loop showing the characteristic of the ferroelectric capacitor is shifted to an axial direction of the voltage.
To prevent deterioration of the characteristic of a ferroelectric capacitor by the imprint, there is proposed an approach to rewrite to a memory cell a logical value which is an inverse of the logical value read from a memory cell after every read operation (refer to, for example, Japanese Unexamined Patent Application Publication No. H07-226086). Further, to prevent deterioration of the characteristic of a ferroelectric capacitor due to reverse polarization (fatigue in a capacitor film), there is proposed an approach to selectively switch a plurality of memory areas to decrease the number of accesses to each ferroelectric memory cell (refer to, for example, Japanese Unexamined Patent Application Publication No. H10-21689). Moreover, there is proposed an approach to decrease the number of accesses to a ferroelectric memory cell by storing the same data in a ferroelectric memory cell and a volatile memory cell (refer to, for example, Japanese Unexamined Patent Application Publication No. H06-215589).
However, when the logical value stored in a memory cell reverses after every rewrite operation, the polarity of the residual dielectric polarization value of a ferroelectric capacitor reverses after every read operation. The imprint can be prevented by repeating reversing of the polarization state, but the hysteresis loop decreases gradually. Thereby, the characteristic of the ferroelectric capacitor deteriorates, and the residual dielectric polarization decreases. In other words, a read margin of the ferroelectric memory cell decreases.
On the other hand, in the case of providing redundant memory areas for decreasing the number of accesses to a ferroelectric memory cell, the number of memory cells becomes double or more. Accordingly, the chip size of the ferroelectric memory increases significantly.
Thus, in prior art, there is a problem that imprint will occur in ferroelectric capacitors and that characteristics will deteriorate.